1. Field of the Invention
The present invention relates to a semiconductor device comprising an electrically rewritable nonvolatile memory cell and method for manufacturing the same.
2. Description of the Related Art
In a nonvolatile semiconductor device comprising a floating gate electrode, the voltage of control electrode controls the voltage of floating gate electrode through a coupling capacitance between the floating gate and the control gate electrode.
When the semiconductor substrate is connected to ground, the voltage Vfg of the floating gate electrode is represented byVfg=C1/(C1+C2)×Vcgwhere C1 is the capacitance between the floating and control gate electrodes, C2 is the capacitance between the floating gate electrode and the semiconductor substrate, and Vcg is the voltage of the control gate electrode. C1/(C1+C2) is called the coupling ratio.
If the dimensions of device structure are further scaled down in the future, a parasitic capacitance (α) will be produced between adjacent cells. In this case, Vfg is represented byVfg=C1/(C1+C2+α)×VcgThus, the coupling ratio is reduced.
If the coupling ratio is reduced, it is required to apply a higher voltage to the control gate electrode in order to carry out a rewrite operation (memory write/erase operation).
However, when the voltage (rewrite voltage) applied to the control electrode is raised for rewrite operation, the rate of degradation of inter-poly insulating film increases. The degradation of the inter-poly insulating film results in dielectric breakdown, an increase in leakage current, and a decrease in reliability.
In order to lower the rewrite voltage and avoid the degradation of the inter-poly insulating film, it is required to enhance the charge injection efficiency of a tunnel insulating film. As a method to increase the charge injection efficiency of the tunnel insulating film, it has been proposed to cause the tunnel insulating film formed of silicon oxide to contain grains of silicon (Jpn. Pat. Appln. KOKAI Publication No. 2003-78050). When the tunnel insulating film is allowed to contain grains of silicon, its charge injection efficiency increases owing to the electron confinement effect.
However, the above method has the following problem.
The gate portion (the tunnel insulating film, the floating gate electrode, the inter-poly insulating film, and the control electrode) of a transistor is formed through dry etching. At the time of the dry etching, the sidewall of the gate portion is damaged by plasma and film quality of the sidewall of the tunnel insulating film is deteriorated. The tunnel insulating film is subjected to charge injection stress. The charge injection stress causes leakage current (stress-induced leakage current) to occur at the sidewall having the deteriorated film quality of the tunnel insulating film. This leakage current causes electrons in the floating gate electrode to flow out, which results in a degradation of charge retention characteristic.